(谭奥维 = tán aòwéi)
I was formerly "Directeur de Recherche" (~ Senior Research Scientist)
at Inria Saclay till June 2014, where I headed the DianNao group,
a joint group with ICT (Beijing, China);
I was also Adjunct Professor at Ecole Polytechnique.
I have now joined Google (Paris and Mountain View offices).
You can still reach me at
My former research and teaching activities are described below.
In a nutshell. There is a remarkable convergence of trends in
technology, applications and machine-learning which, in
my view, irresistibly points towards neuromorphic accelerators
as one of the (very) sensible and promising paths
forward for micro-architecture.
If your (likely and quite forgivable) reaction is "hardware neural
networks, again ?!" or if you want to learn more, you can
Other or past topics.
No teaching was required at Inria, but I enjoyed teaching the Computer Architecture course at Ecole Polytechnique until December 2013.
- Other accelerators (compound ASICs, CGRAs).
- Component-based programming for accelerators.
- Iterative compilation.
- Simulation and methodology.
- Caches and locality analysis.