Professional Services

Sorted by start year (descending):
  • 2014: International Symposium on Computer Architecture (ISCA), Program Committee member.
  • 2014: Symposium on Principles and Practice of Parallel Programming (PPoPP), Program Committee member.
  • 2014: International Symposium on Code Generation and Optimization (CGO), Program Committee member.
  • 2013: International Workshop on Neuro-Inspired Accelerators for Computing (NIAC), Co-Organizer.
  • 2013: International Symposium on Code Generation and Optimization (CGO), Program Committee member.
  • 2013: International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Program Committee member.
  • 2013: International Symposium on Advanced Parallel Processing Technologies (APPT), Program Committee member.
  • 2013: International Symposium on Workload Characterization (IISWC), Program Committee member.
  • 2013: Workshop on Brain-Inspired Computing (BIC), Co-Organizer.
  • 2013-present: International Symposium on Code Generation and Optimization (CGO), Steering Committee chair.
  • 2012: International Symposium on Computer Architecture (ISCA), Program Committee member.
  • 2012: International Symposium on Code Generation and Optimization (CGO), Program Committee member.
  • 2012: International Symposium on Code Generation and Optimization (CGO), Steering Committee member.
  • 2011: International Workshop on New Directions in Computer Architecture (NDCA), Co-Organizer.
  • 2011: International Symposium on Computer Architecture (ISCA), Program Committee member.
  • 2011: International Symposium on Code Generation and Optimization (CGO), General Chair.
  • 2011: International Conference on High Performance Embedded Architectures and Compilers (HiPEAC), Program Co-Chair.
  • 2011: International Symposium on Advanced Parallel Processing Technologies (APPT), .
  • 2010-2012: Member of the Bureau du Comite des Projets.
  • 2010: International Conference on Architecture of Computing Systems (ARCS), Program Committee member.
  • 2010: Member of the ACM SIGARCH Nominating Committee.
  • 2010: Member of the Scientific Advisory Board of Thales TRT.
  • 2010: International Symposium on Microarchitecture (MICRO), Program Committee member.
  • 2010: International Symposium on Computer Architecture (ISCA), Program Committee member.
  • 2010: International Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), Program Committee member.
  • 2010-2013: Leader of the INRIA ByMoore project.
  • 2009-: Organizer of the HiPEAC cluster on New Technologies and New Architecture Paradigms.
  • 2009: International Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), Program Committee member.
  • 2009: International Conference on High Performance Embedded Architectures and Compilers (HiPEAC), Program Committee member.
  • 2009: International Symposium on Computer Architecture (ISCA), Program Committee member.
  • 2009: International Workshop on New Directions in Computer Architecture (NDCA), Program Committee member.
  • 2009: International Symposium on High-Performance Computer Architecture (HPCA), Program Committee member.
  • 2009: International Symposium on Microarchitecture (MICRO), Program Committee member.
  • 2009-2013: Member of the advisory panel of UK project "Biologically-Inspired Massively Parallel Architectures - computing beyond a million processors", coordinated by Steve Furber, University of Manchester.
  • 2008: Design, Automation and Test in Europe (DATE), Program Committee member.
  • 2008: International Symposium on Microarchitecture (MICRO), Program Committee member.
  • 2008: International Conference on High Performance Embedded Architectures and Compilers (HiPEAC), Program Committee member.
  • 2008: Member of the ANR (French NSF) committee for the Computer Architecture call.
  • 2008: International Workshop on Modeling, Benchmarking, and Simulation (MoBS), Program Committee member.
  • 2008-present: HiPEAC2: Steering committee member, Research Workpackage leader, Simulation Cluster leader.
  • 2007: Member of the ANR (French NSF) committee for the Computer Architecture call.
  • 2007: International Symposium on Code Generation and Optimization (CGO), Program Committee member.
  • 2007: International Symposium on High-Performance Computer Architecture (HPCA), Program Committee member.
  • 2007: International Workshop on Statistical and Machine learning approaches applied to ARchitectures and compilaTion (SMART), Program Committee member.
  • 2007: International Symposium on Computer Architecture (ISCA), Program Committee member.
  • 2007: International Conference on High Performance Embedded Architectures and Compilers (HiPEAC), Program Committee member.
  • 2006: International Workshop on Modeling, Benchmarking, and Simulation (MoBS), Program Committee member.
  • 2006: International Conference on High Performance Embedded Architectures and Compilers (HiPEAC), Program Committee member.
  • 2006: International Symposium on Computer Architecture (ISCA), Program Committee member.
  • 2006-2011: Transactions on High Performance Embedded Architectures and Compilers, Associate editor.
  • 2005: International Conference on Parallel Architecture and Compilation Techniques (PACT), Program Committee member.
  • 2005: Design, Automation and Test in Europe (DATE), Program Committee member.
  • 2005: International Symposium on Code Generation and Optimization (CGO), Program Committee member.
  • 2005: International Symposium on Microarchitecture (MICRO), Program Committee member.
  • 2004-2007: HiPEAC (European NoE on High-Performance Embedded Architectures and Compilers): Steering committee member; Simulation Platform leader.
  • 2004: International Conference on High Performance Computing (HiPC), Program Committee member.
  • 2004: International Symposium on Performance Analysis of Systems and Software (ISPASS), Program Committee member.
  • 2004: International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Program Committee member.
  • 2004: International Conference on Parallel Architecture and Compilation Techniques (PACT), Program Committee member.
  • 2004: Symposium en Architecture et Adequation Algorithme/Architecture (SympAAA), Program Committee member.
  • 2004-2010: Leader of the INRIA Alchemy project.
  • 2003: Symposium en Architecture et Adequation Algorithme/Architecture (SympAAA), Program Committee member.
  • 2003-2004: Steering committee member of the CNRS network (RTP) on Architecture and Compilation.
  • 2002: International Conference on High Performance Computing (HiPC), Program Committee member.
  • 2002: Symposium en Architecture et Adequation Algorithme/Architecture (SympAAA), Program Committee member.
  • 2001: Symposium en Architecture et Adequation Algorithme/Architecture (SympAAA), Program Committee member.
  • 2000-2004: Head of Master in Computer Science at University of Paris Sud.
  • 2000-2004: Leader of the Computer Architecture group at Computer Science department (LRI) of University of Paris Sud.
  • 2000-2002: Member of the INRIA postdoc jury.
  • 2000-2002: Member of the SPECIF award jury.
  • 2000: Symposium en Architecture et Adequation Algorithme/Architecture (SympAAA), Program Committee member.
  • 1998: Euro-Par (Euro-Par), Program Committee member.
  • 1996: International Conference on Supercomputing (ICS), Program Committee member.
  • 1995: International Conference on Supercomputing (ICS), Program Committee member.